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? 2003 microchip technology inc. ds21807b-page 1 25aa160a/b, 25lc160a/b device selection table features max. clock 10 mhz low-power cmos technology 2048 x 8-bit organization 16 byte page (?a? version devices) 32 byte page (?b? version devices) write cycle time: 5 ms max. self-timed erase and write cycles block write protection - protect none, 1/4, 1/2 or all of array built-in write protection - power-on/off data protection circuitry - write enable latch - write-protect pin sequential read high reliability - endurance: 1,000,000 erase/write cycles - data retention: > 200 years - esd protection: > 4000v temperature ranges supported; pin function table description the microchip technolo gy inc. 25aa160a/b, 25lc160a/b (25xx160a/b * ) are 16 kbit serial electrically erasable prom s. the memory is accessed via a simple serial perip heral interface? (spi?) compatible serial bus. th e bus signals required are a clock input (sck) plus separa te data in (si) and data out (so) lines. access to the device is controlled through a chip select (cs ) input. communication to the device can be paused via the hold pin (hold ). while the device is paused, transi- tions on its inputs will be ignored, with the exception of chip select, allowing the host to service higher priority interrupts. the 25xx160a/b is avail able in standard packages including 8-lead pdip and soic, and advanced packaging including 8-lead msop, and 8-lead tssop. pb-free (pure matte sn) fi nish is also available. package types (not to scale) part number v cc range page size temp. ranges packages 25lc160a 2.5-5.5v 16 byte i,e p, sn, st, ms 25aa160a 1.8-5.5v 16 byte i p, sn, st, ms 25lc160b 2.5-5.5v 32 byte i,e p, sn, st, ms 25AA160B 1.8-5.5v 32 byte i p, sn, st, ms - industrial (i): -40 cto +85 c - automotive (e): -40c to +125c name function cs chip select input so serial data output wp write-protect v ss ground si serial data input sck serial clock input hold hold input v cc supply voltage cs so wp v ss 1 2 3 4 8 7 6 5 v cc hold sck si pdip/soic (p, sn) tssop/msop cs so wp v ss 1 2 3 4 8 7 6 5 v cc hold sck si (st, ms) 16k spi ? bus serial eeprom *25xx160a/b is used in this document as a generic part number for the 25aa160 a/b, 25lc160a/b devices. spi is a registered tradem ark of motorola semiconductor.
25xx160a/b ds21807b-page 2 ? 2003 microchip technology inc. 1.0 electrical characteristics absolute maximum ratings (?) v cc ......................................... .............................................. ........................................ ..............................................7.0v all inputs and outputs w.r.t. v ss ..................................... .................................. .................................. -0.6v to v cc +1.0v storage temperature .......................... ............................................. ..................................... .....................-65c to 150c ambient temperature under bias ........ ............................................. ............................................ ..............-65c to 125c esd protection on all pins ............ ............................................. ............................................ .....................................4 kv table 1-1: dc characteristics ? notice : stresses above those listed under ?absolute ma ximum ratings? may caus e permanent damage to the device. this is a stress rating only and func tional operation of the device at thos e or any other cond itions above those indicated in the operational l istings of this specification is not implied. exposure to ma ximum rating conditions for an extended period of time ma y affect device reliability. dc characteristics industrial (i): t amb = -40c to +85c v cc = 1.8v to 5.5v automotive (e): t amb = -40c to +125c v cc = 2.5v to 5.5v param. no. sym. characteristic min. max. units test conditions d001 v ih 1 high-level input voltage 2.0 v cc +1 v v cc 2.7v (note) d002 v ih 2 0.7 v cc v cc +1 v v cc < 2.7v (note) d003 v il 1 low-level input voltage -0.3 0.8 v v cc 2.7v (note) d004 v il 2 -0.3 0.2 v cc vv cc < 2.7v (note) d005 v ol low-level output voltage ?0.4vi ol = 2.1 ma d006 v ol ?0.2vi ol = 1.0 ma, v cc < 2.5v d007 v oh high-level output voltage v cc -0.5 ? v i oh = -400 a d008 i li input leakage current 1 acs = v cc , v in = v ss to v cc d009 i lo output leakage current 1 acs = v cc , v out = v ss to v cc d010 c int internal capacitance (all inputs and outputs) ? 7 pf t amb = 25c, clk = 1.0 mhz, v cc = 5.0v (note) d011 i cc read operating current ? ? 6 2.5 ma ma v cc = 5.5v; f clk = 10.0 mhz; so = open v cc = 2.5v; f clk = 5.0 mhz; so = open d012 i cc write ? 3 ma v cc = 5.5v d013 i ccs standby current ? ? 5 1 a a cs = v cc = 5.5v, inputs tied to v cc or v ss , t amb = -40c to +125c cs = v cc = 2.5v, inputs tied to v cc or v ss , t amb = -40c to +85c note: this parameter is periodically sampled and not 100% tested.
? 2003 microchip technology inc. ds21807b-page 3 25xx160a/b table 1-2: ac characteristics ac characteristics industrial (i): t amb = -40c to +85c v cc = 1.8v to 5.5v automotive (e): t amb = -40c to +125c v cc = 2.5v to 5.5v param. no. sym. characteristic min. max. units test conditions 1f clk clock frequency ? ? ? 10 5 3 mhz mhz mhz 4.5v v cc 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v 2t css cs setup time 50 100 150 ? ? ? ns ns ns 4.5v v cc 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v 3t csh cs hold time 100 200 250 ? ? ? ns ns ns 4.5v v cc 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v 4t csd cs disable time 50 ? ns ? 5 tsu data setup time 10 20 30 ? ? ? ns ns ns 4.5v v cc 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v 6t hd data hold time 20 40 50 ? ? ? ns ns ns 4.5v v cc 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v 7t r clk rise time ? 500 ns (note 1) 8t f clk fall time ? 500 ns (note 1) 9t hi clock high time 50 100 150 ? ? ? ns ns ns 4.5v v cc 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v 10 t lo clock low time 50 100 150 ? ? ? ns ns ns 4.5v v cc 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v 11 t cld clock delay time 50 ? ns ? 12 t cle clock enable time 50 ? ns ? 13 t v output valid from clock low ? ? ? 50 100 160 ns ns ns 4.5v v cc 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v 14 t ho output hold time 0 ? ns (note 1) 15 t dis output disable time ? ? ? 40 80 160 ns ns ns 4.5v v cc 5.5v (note 1) 2.5v v cc 4.5v (note 1) 1.8v v cc 2.5v (note 1) 16 t hs hold setup time 20 40 80 ? ? ? ns ns ns 4.5v v cc 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v note 1: this parameter is periodically sampled and not 100% tested. 2: this parameter is not tested but ensured by charac terization. for e ndurance estimates in a specific application, please consult th e total endurance? model which ca n be obtained from our web site: www.microchip.com. 3: t wc begins on the rising edge of cs after a valid write sequence and ends when the internal write cycle is complete.
25xx160a/b ds21807b-page 4 ? 2003 microchip technology inc. table 1-3: ac test conditions 17 t hh hold hold time 20 40 80 ? ? ? ns ns ns 4.5v v cc 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v 18 t hz hold low to output high-z 30 60 160 ? ? ? ns ns ns 4.5v v cc 5.5v (note 1) 2.5v v cc < 4.5v (note 1) 1.8v v cc < 2.5v (note 1) 19 t hv hold high to output valid 30 60 160 ? ? ? ns ns ns 4.5v v cc 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v 20 t wc internal write cycle time ? 5 ms (n ote 3) 21 ? endurance 1m ? e/w cycles (n ote 2) table 1-2: ac characteristics (continued) ac characteristics industrial (i): t amb = -40c to +85c v cc = 1.8v to 5.5v automotive (e): t amb = -40c to +125c v cc = 2.5v to 5.5v param. no. sym. characteristic min. max. units test conditions note 1: this parameter is periodically sampled and not 100% tested. 2: this parameter is not tested but ensured by charac terization. for endurance estimates in a specific application, please consult the total endurance? mo del which can be obtained from our web site: www.microchip.com. 3: t wc begins on the rising edge of cs after a valid write sequence and ends when the internal write cycle is complete. ac waveform: v lo = 0.2v ? v hi = v cc - 0.2v (note 1) v hi = 4.0v (note 2) timing measurement reference level input 0.5 v cc output 0.5 v cc note 1: for v cc 4.0v 2: for v cc > 4.0v
? 2003 microchip technology inc. ds21807b-page 5 25xx160a/b figure 1-1: hold timing figure 1-2: serial input timing figure 1-3: serial output timing cs sck so si hold 17 16 16 17 19 18 don?t care 5 high-impedance n+2 n+1 n n-1 n n+2 n+1 n n n-1 cs sck si so 6 5 8 7 11 3 lsb in msb in high-impedance 12 mode 1,1 mode 0,0 2 4 cs sck so 10 9 13 msb out isb out 3 15 don?t care si mode 1,1 mode 0,0 14
25xx160a/b ds21807b-page 6 ? 2003 microchip technology inc. 2.0 functional description 2.1 principles of operation the 25xx160a/b are 2048 byte serial eeproms designed to interface directly with the serial peripheral interface (spi) port of many of today?s popular microcontroller families, including microchip?s picmicro ? microcontrollers. it ma y also interface with microcontrollers that do no t have a built-in spi port by using discrete i/o lines pr ogrammed properly with the software. the 25xx160a/b contains an 8-bit instruction register. the device is accessed via the si pin, with data being clocked in on the rising edge of sck. the cs pin must be low and the hold pin must be high for the entire operation. table 2-1 contains a list of the possible instruction bytes and format for device operation. all instructions, addresses, and data are transferred msb first, lsb last. data (si) is sampled on th e first rising edge of sck after cs goes low. if the clock line is shared with other peripheral devices on the sp i bus, the user can assert the hold input and place the 25xx160a/b in ?hold? mode. after releasing the hold pin, operation will resume from the point when the hold was asserted. 2.2 read sequence the device is sele cted by pulling cs low. the 8-bit read instruction is transmitted to the 25xx160a/b followed by the 16-bit address, wi th the five msbs of the address being don?t care bi ts. after the correct read instruction and address are sent, the data stored in the memory at the selected a ddress is shifted out on the so pin. the data stored in the memory at the next address can be read seq uentially by continuing to provide clock pulses. the in ternal address pointer is automatically incremented to the next higher address after each byte of data is shifted out. when the highest address is reached (07ffh), the address counter rolls over to address 0000h allo wing the read cycle to be continued indefinitely. the read operation is terminated by raising the cs pin (figure 2-1). 2.3 write sequence prior to any attempt to writ e data to the 25xx160a/b, the write enable latch must be set by issuing the wren instruction (figure 2-4). th is is done by setting cs low and then clocking out the pr oper instruction into the 25xx160a/b. after all eight bi ts of the instruction are transmitted, the cs must be brought high to set the write enable latch. if the wr ite operation is initiated immediately after the wren instruction without cs being brought high, the data w ill not be written to the array because the write enable latch will not have been properly set. once the write enable la tch is set, the user may proceed by setting the cs low, issuing a write instruction, followed by the 16-bit address, with the five msbs of the address being d on?t care bits, and then the data to be written. up to 16 bytes (25xx160a) or 32 bytes (25xx160b) of data ca n be sent to the device before a write cycle is necess ary. the only restriction is that all of the bytes must reside in the same page. for the data to be actually written to the array, the cs must be brought high after the least significant bit (d0) of the n th data byte has been clocked in. if cs is brought high at any other ti me, the write operation will not be completed. refer to figure 2-2 and figure 2-3 for more detailed illustra tions on the byte write sequence and the page write sequence respectively. while the write is in progress , the status register may be read to check the status of the wpen, wip, wel, bp1 and bp0 bits (figure 2-6 ). a read attempt of a memory array location will not be possible during a write cycle. when the write cycle is completed, the write enable latch is reset. note: page write operations are limited to writing bytes within a single physical page, regardless of the number of bytes actually being writ ten. physical page boundaries start at addresses that are integer multiples of the page buffer size (or ?page size?) and, end at addresses that are integer multiples of page size - 1. if a page write command attempts to write across a physical page boundary, the result is that the data wraps around to the beginning of the current page (overwriting data previously stored there), instead of being written to the next page as might be expected. it is therefore necessary for the application software to prevent page write operations that would attempt to cross a page boundary.
? 2003 microchip technology inc. ds21807b-page 7 25xx160a/b block diagram figure 2-1: read sequence si so sck cs hold wp status register i/o control memory control logic x dec hv generator eeprom array page latches y decoder sense amp. r/w control logic v cc v ss table 2-1: instruction set instruction name instru ction format description read 0000 0011 read data from memory array beginning at selected address write 0000 0010 write data to memory array beginning at selected address wrdi 0000 0100 reset the write enable latc h (disable write operations) wren 0000 0110 set the write enable latch (enable write operations) rdsr 0000 0101 read status register wrsr 0000 0001 write status register so si sck cs 0 2 3 4 5 6 7 8 9 10 11 21222324252627282930 31 1 01 0 0 0 0 0 1 15 14 13 12 210 76543210 instruction 16-bit address data out high-impedance
25xx160a/b ds21807b-page 8 ? 2003 microchip technology inc. figure 2-2: byte write sequence figure 2-3: page write sequence so si cs 9 1011 21222324252627282930 31 00 0 0 0 0 0 1 15 14 13 12 210 76543210 instruction 16-bit address data byte high-impedance sck 0 234567 1 8 twc si cs 9 1011 21222324252627282930 31 00 0 0 0 0 0 1 15 14 13 12 210 76543210 instruction 16-bit address data byte 1 sck 0 234567 1 8 si cs 41 42 43 46 47 76543210 data byte n (16/32 max) sck 32 34 35 36 37 38 39 33 40 76543210 data byte 3 76543210 data byte 2 44 45
? 2003 microchip technology inc. ds21807b-page 9 25xx160a/b 2.4 write enable ( wren ) and write disable ( wrdi ) the 25xx160a/b contains a write enable latch. see table 2-4 for the write-protect functionality matrix. this latch must be set before any write operation will be completed internally. the wren instruction will set the latch, and the wrdi will reset the latch. the following is a list of conditions under which the write enable latch will be reset: power-up wrdi instruction successfully executed wrsr instruction successfully executed write instruction successfully executed figure 2-4: write enable sequence ( wren ) figure 2-5: write disable sequence ( wrdi ) sck 0 234567 1 si high-impedance so cs 01 0000 0 1 sck 0234567 1 si high-impedance so cs 01 0000 0 1 0
25xx160a/b ds21807b-page 10 ? 2003 microchip technology inc. 2.5 read status register instruction ( rdsr ) the read status register instruction ( rdsr ) provides access to the status register. the status register may be read at any time, even during a write cycle. the status register is formatted as follows: table 2-2: status register the write-in-process (wip) bit indicates whether the 25xx160a/b is busy with a write operation. when set to a ? 1 ?, a write is in progress, when set to a ? 0 ?, no write is in progress. this bit is read-only. the write enable latch (wel) bit indicates the status of the write enable latch an d is read-only. when set to a ? 1 ?, the latch allows writes to the array, when set to a ? 0 ?, the latch prohibits writes to the array. the state of this bit can always be updated via the wren or wrdi commands regardless of the state of write protection on the status register. these commands are shown in figure 2-4 and figure 2-5. the block protection (bp0 and bp1) bits indicate which blocks are currently write-protected. these bits are set by the user issuing the wrsr instruction. these bits are nonvolatile, and are shown in table 2-3. see figure 2-6 for the rdsr timing sequence. figure 2-6: read status register timing sequence ( rdsr ) 7 654 3 2 1 0 w/r ? ? ? w/r w/r r r wpen x x x bp1 bp0 wel wip w/r = writable/readable. r = read-only. so si cs 91011 12131415 11 0 0 0 0 00 7654 2 10 instruction data from status register high-impedance sck 0 234567 1 8 3
? 2003 microchip technology inc. ds21807b-page 11 25xx160a/b 2.6 write status register instruction ( wrsr ) the write status register instruction ( wrsr ) allows the user to write to the nonv olatile bits in the status register as shown in table 2-2. the user is able to select one of four levels of protection for the array by writing to the appropriate bits in the status register. the array is divided up into four segments. the user has the ability to write-protect none, one, two or all four of the segments of the array. the partitioning is controlled as shown in table 2-3. the write-protect enable (wpen) bit is a nonvolatile bit that is available as an enable bit for the wp pin. the write-protect (wp ) pin and the write-protect enable (wpen) bit in the status register control the programmable hardware write- protect feature. hard- ware write protection is enabled when wp pin is low and the wpen bit is high. hardware write protection is disabled when either the wp pin is high or the wpen bit is low. when the chip is hardware write-protected, only writes to nonvolatile bits in the status register are disabled. see table 2-4 for a matrix of functionality on the wpen bit. see figure 2-7 for the wrsr timing sequence. table 2-3: array protection figure 2-7: write status register timing sequence ( wrsr ) bp1 bp0 array addresses write-protected 00 none 01 upper 1/4 (0600h - 07ffh) 10 upper 1/2 (0400h - 07ffh) 11 all (0000h - 07ffh) so si cs 91011 12131415 01 0 0 0 0 00 7654 210 instruction data to status register high-impedance sck 0 234567 1 8 3
25xx160a/b ds21807b-page 12 ? 2003 microchip technology inc. 2.7 data protection the following protection has been implemented to prevent inadvertent writes to the array: the write enable latc h is reset on power-up a write enable instructio n must be issued to set the write enable latch after a byte write, page write or status register write, the write enable latch is reset cs must be set high afte r the proper number of clock cycles to start an internal write cycle access to the array during an internal write cycle is ignored and progra mming is continued 2.8 power-on state the 25xx160a/b powers on in the following state: the device is in lo w-power standby mode (cs = 1 ) the write enable latch is reset so is in high-impedance state a high-to-low-level transition on cs is required to enter active state table 2-4: write-protect functionality matrix wel (sr bit 1) wpen (sr bit 7) wp (pin 3) protected blocks unprotected blocks status register 0xx protected protected protected 10x protected writable writable 1 1 0 (low) protected writable protected 1 1 1 (high) protected writable writable x = don?t care
? 2003 microchip technology inc. ds21807b-page 13 25xx160a/b 3.0 pin descriptions the descriptions of the pins are listed in table 3-1. table 3-1: pin function table 3.1 chip select (cs ) a low level on this pin selects the device. a high level deselects the device and forc es it into standby mode. however, a programming cycle which is already initi- ated or in progress will be completed, regardless of the cs input signal. if cs is brought high during a program cycle, the device will go in to standby mode as soon as the programming cycle is comp lete. when the device is deselected, so goes to the high-impedance state, allowing multiple parts to share the same spi bus. a low-to-high transition on cs after a valid write sequence initiates an intern al write cycle. after power- up, a low level on cs is required prior to any sequence being initiated. 3.2 serial output (so) the so pin is used to transfer data out of the 25xx160a/b. during a read cycle, data is shifted out on this pin after the falling edge of the serial clock. 3.3 write-protect (wp ) this pin is used in conjuncti on with the wpen bit in the status register to prohibit writes to the nonvolatile bits in the status register. when wp is low and wpen is high, writing to the nonvol atile bits in the status register is disabled. all other operations function normally. when wp is high, all functions, including writes to the nonvolatile bits in the status register operate normally. if the wpen bit is set, wp low during a status register write seq uence will disable writing to the status register. if an internal write cycle has already begun, wp going low will have no effect on the write. the wp pin function is blocked when the wpen bit in the status register is low. th is allows the user to install the 25xx160a/b in a system with wp pin grounded and still be able to write to the status register. the wp pin functions will be enabled when the wpen bit is set high. 3.4 serial input (si) the si pin is used to transfer data into the device. it receives instructions, addr esses and data. data is latched on the rising edge of the serial clock. 3.5 serial clock (sck) the sck is used to synchronize the communication between a master and the 25xx160a/b. instructions, addresses or data present on the si pin are latched on the rising edge of the clock input, while data on the so pin is updated after the fallin g edge of the clock input. 3.6 hold (hold ) the hold pin is used to suspend transmission to the 25xx160a/b while in the midd le of a serial sequence without having to retransmit the entire sequence again. it must be held high any time this function is not being used. once the device is selected and a serial sequence is underway, the hold pin may be pulled low to pause further seri al communication without resetting the serial sequence. the hold pin must be brought low while sck is low, otherwise the hold function will not be invoke d until the next sck high-to- low transition. the 25xx160a/b must remain selected during this sequence. the si, sck and so pins are in a high impedance state during the time the device is paused and transitions on thes e pins will be ignored. to resume serial co mmunication, hold must be brought high while the sck pin is low, otherwise serial communication will not re sume. lowering the hold line at any time will tri-state the so line. name pin number function cs 1 chip select input so 2 serial data output wp 3 write-protect pin v ss 4 ground si 5 serial data input sck 6 serial clock input hold 7 hold input v cc 8 supply voltage
25xx160a/b ds21807b-page 14 ? 2003 microchip technology inc. 4.0 packaging information 4.1 package marking information legend: xx...x part number t temperature (i, e) blank commercial yy year code (last 2 digits of calendar year) except tssop and msop which use only the last 1 digit ww week code (week of ja nuary 1 is week ?01?) nnn alphanumeric traceability code note : custom marking available. 8-lead msop (150 mil) example: xxxxxxt ywwnnn 5labi 3281l7 t/xxxnnn xxxxxxxx yyww 8-lead pdip 8-lead soic t/xxyyww xxxxxxxx nnn xxxx tyww 8-lead tssop nnn i/p 1l7 25lc160b 0328 example: example: i/sn 0328 25lc160b 1l7 1l7 5lab i328 example: msop 1st line marking codes device 25aa160a 25AA160B 25lc160a 25lc160b std mark pb-free mark tssop 1st line marking codes device 25aa160a 25AA160B 25lc160a 25lc160b std mark pb-free mark 5aaa 5aab 5laa 5lab naaa naab nlaa nlab 5aaa 5aab 5laa 5lab g5aaa g5aab g5laa g5lab
? 2003 microchip technology inc. ds21807b-page 15 25xx160a/b 8-lead plastic micro small outline package (ms) (msop) d a a1 l c (f) a2 e1 e p b n 1 2 dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not .037 ref f footprint (reference) exceed .010" (0.254mm) per side. notes: drawing no. c04-111 *controlling parameter mold draft angle top mold draft angle bottom foot angle lead width lead thickness c b .003 .009 .006 .012 dimension limits overall height molded package thickness molded package width overall length foot length standoff overall width number of pins pitch a l e1 d a1 e a2 .016 .024 .118 bsc .118 bsc .000 .030 .193 typ. .033 min p n units .026 bsc nom 8 inches 0.95 ref - - .009 .016 0.08 0.22 0 0.23 0.40 8 millimeters* 0.65 bsc 0.85 3.00 bsc 3.00 bsc 0.60 4.90 bsc .043 .031 .037 .006 0.40 0.00 0.75 min max nom 1.10 0.80 0.15 0.95 max 8 -- - 15 5 - 15 5 - jedec equivalent: mo-187 0 - 8 5 5 - - 15 15 - - - -
25xx160a/b ds21807b-page 16 ? 2003 microchip technology inc. 8-lead plastic dual in-line (p) ? 300 mil (pdip) b1 b a1 a l a2 p e eb c e1 n d 1 2 units inches* millimeters dimension limits min nom max min nom max number of pins n 88 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .11 5 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .360 .373 .385 9.14 9.46 9.78 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top 5 10 15 5 10 15 mold draft angle bottom 5 10 15 5 10 15 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flas h or protrusions shall not exceed jedec equivalent: ms-001 drawing no. c04-018 .010? (0.254mm) per side. significant characteristic
? 2003 microchip technology inc. ds21807b-page 17 25xx160a/b 8-lead plastic small outlin e (sn) ? narrow, 150 mil (soic) foot angle 048048 15 12 0 15 12 0 mold draft angle bottom 15 12 0 15 12 0 mold draft angle top 0.51 0.42 0.33 .020 .017 .013 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 0.76 0.62 0.48 .030 .025 .019 l foot length 0.51 0.38 0.25 .020 .015 .010 h chamfer distance 5.00 4.90 4.80 .197 .193 .189 d overall length 3.99 3.91 3.71 .157 .154 .146 e1 molded package width 6.20 6.02 5.79 .244 .237 .228 e overall width 0.25 0.18 0.10 .010 .007 .004 a1 standoff 1.55 1.42 1.32 .061 .056 .052 a2 molded package thickness 1.75 1.55 1.35 .069 .061 .053 a overall height 1.27 .050 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters inches* units 2 1 d n p b e e1 h l c 45 a2 a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flas h or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-012 drawing no. c04-057 significant characteristic
25xx160a/b ds21807b-page 18 ? 2003 microchip technology inc. 8-lead plastic thin shrink sma ll outline (st) ? 4.4 mm (tssop) 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.30 0.25 0.19 .012 .010 .007 b lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 0.70 0.60 0.50 .028 .024 .020 l foot length 3.10 3.00 2.90 .122 .118 .114 d molded package length 4.50 4.40 4.30 .177 .173 .169 e1 molded package width 6.50 6.38 6.25 .256 .251 .246 e overall width 0.15 0.10 0.05 .006 .004 .002 a1 standoff 0.95 0.90 0.85 .037 .035 .033 a2 molded package thickness 1.10 .043 a overall height 0.65 .026 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters* inches units a2 a a1 l c 1 2 d n p b e e1 foot angle 048048 * controlling parameter notes: dimensions d and e1 do not inc lude mold flash or protrusions. mold flas h or protrusions shall not exceed .005? (0.127mm) per side. jedec equivalent: mo-153 drawing no. c04-086 significant characteristic
? 2003 microchip technology inc. ds21807b-page 19 25aa160a/b, 25lc160a/b on-line support microchip provides on-line support on the microchip world wide web site. the web site is used by microchip as a means to make files and information easily available to customers. to view the site, the user must have access to the internet and a web browser, such as netscape ? or microsoft ? internet explorer. files are also available for ftp download from our ftp site. connecting to the microchip internet web site the microchip web site is available at the following url: www.microchip.com the file transfer site is available by using an ftp service to connect to: ftp://ftp.microchip.com the web site and file transfer site provide a variety of services. users may downlo ad files for the latest development tools, data sheets, application notes, user's guides, articles and sample programs. a variety of microchip spe cific business information is also available, including li stings of microchip sales offices, distributors and fa ctory representatives. other data available for consideration is: latest microchip press releases technical support section with frequently asked questions design tips device errata job postings microchip consultant program member listing links to other useful web sites related to microchip products conferences for products, development systems, technical information and more listing of seminars and events systems information and upgrade hot line the systems information and upgrade line provides system users a listing of th e latest versions of all of microchip's development systems software products. plus, this line provides in formation on how customers can receive the most curren t upgrade kits.the hot line numbers are: 1-800-755-2345 for u.s. an d most of canada, and 1-480-792-7302 for the rest of the world. 042003
25aa160a/b, 25lc160a/b ds21807b-page 20 ? 2003 microchip technology inc. reader response it is our intention to provide yo u with the best documentation possible to en sure successful use of your microchip prod- uct. if you wish to provide your comm ents on organization, clarity, subject matt er, and ways in which our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-4150. please list the following information, and use this outline to provide us wi th your comments about this document. to : technical publications manager re: reader response total pages sent ________ from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _ ________ - _________ ds21807b 25aa160a/b, 25lc160a/b 1. what are the best features of this document? 2. how does this document meet your ha rdware and software development needs? 3. do you find the organization of this document easy to follow? if not, why? 4. what additions to the document do you th ink would enhance the structure and subject? 5. what deletions from the document could be made without affecting the overall usefulness? 6. is there any incorrect or mislead ing information (what and where)? 7. how would you improve this document?
? 2003 microchip technology inc. ds21807b-page 21 25xx160a/b product identification system to order or obtain information, e.g., on pricing or deliv ery, refer to the factory or the listed sales office . sales and support part no. x /xx x lead package tape & reel device device 25aa160a 25AA160B 25lc160a 25lc160b 16 kbit, 1.8v, 16 byte page spi serial eeprom 16 kbit, 1.8v, 32 byt e page spi serial eeprom 16 kbit, 2.5v, 16 byte page spi serial eeprom 16 kbit, 2.5v, 32 byte page spi serial eeprom tape & reel blank = t= standard packaging tape & reel temperature range i = e= -40 c to+85 c -40 c to+125 c package ms = p= sn = st = plastic msop (mic ro small outline), 8-lead plastic dip (300 mil body), 8-lead plastic soic (150 mil body), 8-lead tssop, 8-lead lead finish blank = g= standard 63% / 37% sn/pb matte tin (pure sn) examples: a) 25aa160a-i/ms = 16 kbit , 16-byte page, 1.8v serial eeprom, indus trial temp., msop package b) 25AA160B-i/stg = 16 kbit, 32-byte page, 1.8v serial eeprom, indus trial temp., tssop package, pb-free c) 25aa160at-i/sn = 16 kbit , 16-byte page, 1.8v serial eeprom, industri al temp., tape & reel, soic package d) 25lc160a-i/msg = 16 kbit, 16-byte page, 2.5v serial eeprom , industrial temp., msop package, pb-free e) 25lc160bt-i/sn = 16 kbit, 32-byte page, 2.5v serial eeprom, indust rial temp., tape & reel, soic package f) 25lc160bt-i/st = 16 kbit, 32-byte page, 2.5v serial eeprom, indust rial temp., tape & reel, tssop package ? finish data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recommended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literatu re center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon a nd data sheet (include literature #) you are using. new customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products. x temp range
25xx160a/b ds21807b-page 22 ? 2003 microchip technology inc. notes:
? 2003 microchip technology inc. ds21807b-page 23 information contained in this publication regarding device applications and the like is in tended through suggestion only and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. no representation or warranty is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual pr operty rights arising from such use or otherwise. use of microchip?s products as critical com- ponents in life support systems is not authorized except with express written approval by microchip. no licenses are con- veyed, implicitly or otherwise, under any intellectual property rights. trademarks the microchip name and logo, t he microchip logo, accuron, dspic, k ee l oq , mplab, pic, picmicro, picstart, pro mate and powersmart are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. amplab, filterlab, micro id , mxdev, mxlab, picmaster, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. application maestro, dspicdem, dspicdem.net, ecan, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, microport, migratable memory, mpasm, mplib, mplink, mpsim, pickit, picdem, picdem. net, powercal, powerinfo, powermate, powertool, rflab, rfpic, select mode, smartsensor, smartshunt, smarttel and total endurance are trademarks of microchip technology incorporated in the u.s.a. and other countries. serialized quick turn programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2003, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the cod e protection feature on microchip devices: microchip products meet the specification cont ained in their particular microchip data sheet. microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. there are dishonest and possibly illegal me thods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip products in a manner outsi de the operating specifications contained in microchip's data sheets. most likely, the person doing so is engaged in theft of intellectual property. microchip is willing to work with the customer who is concerned about the integrity of their code. neither microchip nor any other semiconductor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improving the code protection features of our products. attempts to break micro chip?s code protection feature may be a violation of the digita l millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted wo rk, you may have a right to sue for relief under that act. microchip received qs-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona in july 1999 and mountain view, california in march 2002. the company?s quality system processes and procedures are qs-9000 compliant for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial ee proms, microperipherals, non-volatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001 certified.
ds21807b-page 24 ? 2003 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: 480-792-7627 web address: http://www.microchip.com atlanta 3780 mansell road, suite 130 alpharetta, ga 30022 tel: 770-640-0034 fax: 770-640-0307 boston 2 lan drive, suite 120 westford, ma 01886 tel: 978-692-3848 fax: 978-692-3821 chicago 333 pierce road, suite 180 itasca, il 60143 tel: 630-285-0071 fax: 630-285-0075 dallas 4570 westgrove drive, suite 160 addison, tx 75001 tel: 972-818-7423 fax: 972-818-2924 detroit tri-atria office building 32255 northwestern h ighway, suite 190 farmington hills, mi 48334 tel: 248-538-2250 fax: 248-538-2260 kokomo 2767 s. albright road kokomo, in 46902 tel: 765-864-8360 fax: 765-864-8387 los angeles 18201 von karman, suite 1090 irvine, ca 92612 tel: 949-263-1888 fax: 949-263-1338 phoenix 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7966 fax: 480-792-4338 san jose microchip technology inc. 2107 north first street, suite 590 san jose, ca 95131 tel: 408-436-7950 fax: 408-436-7955 toronto 6285 northam drive, suite 108 mississauga, ontario l4v 1x5, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific australia microchip technology australia pty ltd marketing support division suite 22, 41 rawson street epping 2121, nsw australia tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing microchip technolo gy consulting (shanghai) co., ltd., beijing liaison office unit 915 bei hai wan tai bldg. no. 6 chaoyangmen beidajie beijing, 100027, no. china tel: 86-10-85282100 fax: 86-10-85282104 china - chengdu microchip technolo gy consulting (shanghai) co., ltd., chengdu liaison office rm. 2401-2402, 24th floor, ming xing financial tower no. 88 tidu street chengdu 610016, china tel: 86-28-86766200 fax: 86-28-86766599 china - fuzhou microchip technolo gy consulting (shanghai) co., ltd., fuzhou liaison office unit 28f, world trade plaza no. 71 wusi road fuzhou 350001, china tel: 86-591-7503506 fax: 86-591-7503521 china - hong kong sar microchip technology hongkong ltd. unit 901-6, tower 2, metroplaza 223 hing fong road kwai fong, n.t., hong kong tel: 852-2401-1200 fax: 852-2401-3431 china - shanghai microchip technolo gy consulting (shanghai) co., ltd. room 701, bldg. b far east international plaza no. 317 xian xia road shanghai, 200051 tel: 86-21-6275-5700 fax: 86-21-6275-5060 china - shenzhen microchip technolo gy consulting (shanghai) co., ltd., shenzhen liaison office rm. 1812, 18/f, building a, united plaza no. 5022 binhe road, futian district shenzhen 518033, china tel: 86-755-82901380 fax: 86-755-8295-1393 china - qingdao rm. b505a, fullhope plaza, no. 12 hong kong central rd. qingdao 266071, china tel: 86-532-5027355 fax: 86-532-5027205 india microchip technology inc. india liaison office marketing support division divyasree chambers 1 floor, wing a (a3/a4) no. 11, o?shaugnessey road bangalore, 560 025, india tel: 91-80-2290061 fax: 91-80-2290062 japan microchip technology japan k.k. benex s-1 6f 3-18-20, shinyokohama kohoku-ku, yokohama-shi kanagawa, 222-0033, japan tel: 81-45-471- 6166 fax: 81-45-471-6122 korea microchip technology korea 168-1, youngbo bldg. 3 floor samsung-dong, kangnam-ku seoul, korea 135-882 tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 singapore microchip technology singapore pte ltd. 200 middle road #07-02 prime centre singapore, 188980 tel: 65-6334-8870 fax: 65-6334-8850 taiwan microchip technology (barbados) inc., taiwan branch 11f-3, no. 207 tung hua north road taipei, 105, taiwan tel: 886-2-2717-7175 fax: 886-2-2545-0139 europe austria microchip technology austria gmbh durisolstrasse 2 a-4600 wels austria tel: 43-7242-2244-399 fax: 43-7242-2244-393 denmark microchip technology nordic aps regus business centre lautrup hoj 1-3 ballerup dk-2750 denmark tel: 45-4420-9895 fax: 45-4420-9910 france microchip technology sarl parc d?activite du moulin de massy 43 rue du saule trapu batiment a - ler etage 91300 massy, france tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany microchip technology gmbh steinheilstrasse 10 d-85737 ismaning, germany tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy microchip technology srl via quasimodo, 12 20025 legnano (mi) milan, italy tel: 39-0331-742611 fax: 39-0331-466781 netherlands microchip technology netherlands p. a. de biesbosch 14 nl-5152 sc drunen, netherlands tel: 31-416-690399 fax: 31-416-690340 united kingdom microchip ltd. 505 eskdale road winnersh triangle wokingham berkshire, england rg41 5tu tel: 44-118-921-5869 fax: 44-118-921-5820 07/10/03 w orldwide s ales and s ervice

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